RT-Thread RTOS 1.2.0
An open source embedded real-time operating system
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hwtimer.h
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1/*
2 * Copyright (c) 2006-2023, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 */
9#ifndef __HWTIMER_H__
10#define __HWTIMER_H__
11
12#include <rtthread.h>
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18/* Timer Control Command */
19typedef enum
20{
21 HWTIMER_CTRL_FREQ_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x01, /* set the count frequency */
22 HWTIMER_CTRL_STOP = RT_DEVICE_CTRL_BASE(Timer) + 0x02, /* stop timer */
23 HWTIMER_CTRL_INFO_GET = RT_DEVICE_CTRL_BASE(Timer) + 0x03, /* get a timer feature information */
24 HWTIMER_CTRL_MODE_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x04 /* Setting the timing mode(oneshot/period) */
26
27/* Timing Mode */
33
34/* Time Value */
35typedef struct rt_hwtimerval
36{
37 rt_int32_t sec; /* second */
38 rt_int32_t usec; /* microsecond */
40
41#define HWTIMER_CNTMODE_UP 0x01 /* increment count mode */
42#define HWTIMER_CNTMODE_DW 0x02 /* decreasing count mode */
43
45
47{
48 void (*init)(struct rt_hwtimer_device *timer, rt_uint32_t state);
50 void (*stop)(struct rt_hwtimer_device *timer);
52 rt_err_t (*control)(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args);
53};
54
55/* Timer Feature Information */
57{
58 rt_int32_t maxfreq; /* the maximum count frequency timer support */
59 rt_int32_t minfreq; /* the minimum count frequency timer support */
60 rt_uint32_t maxcnt; /* counter maximum value */
61 rt_uint8_t cntmode; /* count mode (inc/dec) */
62};
63
64typedef struct rt_hwtimer_device
65{
67 const struct rt_hwtimer_ops *ops;
68 const struct rt_hwtimer_info *info;
69
70 rt_int32_t freq; /* counting frequency set by the user */
71 rt_int32_t overflow; /* timer overflows */
73 rt_int32_t cycles; /* how many times will generate a timeout event after overflow */
74 rt_int32_t reload; /* reload cycles(using in period mode) */
75 rt_hwtimer_mode_t mode; /* timing mode(oneshot/period) */
77
78rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data);
80
81#ifdef RT_USING_DM
82extern void (*rt_device_hwtimer_us_delay)(rt_uint32_t us);
83#endif
84
85#ifdef __cplusplus
86}
87#endif
88
89#endif
#define RT_DEVICE_CTRL_BASE(Type)
rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data)
rt_hwtimer_ctrl_t
@ HWTIMER_CTRL_INFO_GET
@ HWTIMER_CTRL_STOP
@ HWTIMER_CTRL_FREQ_SET
@ HWTIMER_CTRL_MODE_SET
void rt_device_hwtimer_isr(rt_hwtimer_t *timer)
rt_hwtimer_mode_t
@ HWTIMER_MODE_ONESHOT
@ HWTIMER_MODE_PERIOD
struct rt_hwtimerval rt_hwtimerval_t
struct rt_hwtimer_device rt_hwtimer_t
rt_base_t rt_err_t
unsigned char rt_uint8_t
unsigned int rt_uint32_t
signed int rt_int32_t
const struct rt_hwtimer_info * info
rt_int32_t overflow
const struct rt_hwtimer_ops * ops
rt_hwtimer_mode_t mode
struct rt_device parent
rt_int32_t minfreq
rt_int32_t maxfreq
rt_uint8_t cntmode
rt_uint32_t maxcnt
void(* init)(struct rt_hwtimer_device *timer, rt_uint32_t state)
rt_err_t(* start)(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
rt_uint32_t(* count_get)(struct rt_hwtimer_device *timer)
void(* stop)(struct rt_hwtimer_device *timer)
rt_err_t(* control)(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args)
rt_int32_t sec
rt_int32_t usec